Journal
2013 IEEE 33RD INTERNATIONAL CONFERENCE ON DISTRIBUTED COMPUTING SYSTEMS (ICDCS)
Volume -, Issue -, Pages 31-40Publisher
IEEE
DOI: 10.1109/ICDCS.2013.17
Keywords
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Funding
- National Science Foundation [1127904, 1138666, 0855180, 0905493]
- DARPA/I2O
- Singapore Government
- Fujitsu Labs
- Wipro Applied Research
- Georgia Tech Foundation
- Division Of Computer and Network Systems
- Direct For Computer & Info Scie & Enginr [1138666, 0855180] Funding Source: National Science Foundation
- Div Of Industrial Innovation & Partnersh
- Directorate For Engineering [1127904] Funding Source: National Science Foundation
- Div Of Information & Intelligent Systems
- Direct For Computer & Info Scie & Enginr [0905493] Funding Source: National Science Foundation
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Identifying the location of performance bottlenecks is a non-trivial challenge when scaling n-tier applications in computing clouds. Specifically, we observed that an n-tier application may experience significant performance loss when there are transient bottlenecks in component servers. Such transient bottlenecks arise frequently at high resource utilization and often result from transient events (e.g., JVM garbage collection) in an n-tier system and bursty workloads. Because of their short lifespan (e.g., milliseconds), these transient bottlenecks are difficult to detect using current system monitoring tools with sampling at intervals of seconds or minutes. We describe a novel transient bottleneck detection method that correlates throughput (i.e., request service rate) and load (i.e., number of concurrent requests) of each server in an n-tier system at fine time granularity. Both throughput and load can be measured through passive network tracing at millisecond-level time granularity. Using correlation analysis, we can identify the transient bottlenecks at time granularities as short as 50ms. We validate our method experimentally through two case studies on transient bottlenecks caused by factors at the system software layer (e.g., JVM garbage collection) and architecture layer (e.g., Intel SpeedStep).
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