Gate modeling of metal-insulator-semiconductor devices based on ultra-thin atomic-layer deposited TiO2

Metal-insulator-semiconductor devices having different oxide thicknesses (10, 6, 4 and 2 nm) were fabricated using atomic-layer deposited ultra-thin amorphous TiO2 as gate dielectric. From Ig-Vg measurements it was determined that the main conduction mechanism is Schottky emission for all thicknesses and even after passivation of the semiconductor-insulator interface using SiOx. Furthermore, the Schottky barrier height (I broken vertical bar(B)) increases when the oxide thickness decreases; this was further corroborated using semi empirical models and SILVACO simulations having excellent agreement. From this analysis, important physical parameters like barrier height (I broken vertical bar(B)), effective mass (m*) and optical dielectric constant (epsilon (r) ) were extracted, and could be used to effectively understand the performance and reliability of these devices. From the extraction of physical parameters associated to the conduction mechanism, a correlation between materials' properties with device performance could be obtained (higher barrier height (I broken vertical bar(B)) would result in a decrease in leakage current). Also, the high reproducibility enables enhanced performance and therefore, better reliability predictions for electron devices based on these oxides.