4.8 Article

Hybrid Cascaded Multilevel Inverter (HCMLI) With Improved Symmetrical 4-Level Submodule

Journal

IEEE TRANSACTIONS ON POWER ELECTRONICS
Volume 33, Issue 2, Pages 932-935

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TPEL.2017.2726087

Keywords

Hybrid cascaded multilevel inverter (HCMLI); reduced switch count; symmetrical submodule

Ask authors/readers for more resources

This letter proposes an improved symmetrical 4-level submodule as a basic cell for generating multiple dc voltage levels. A hybrid cascaded multilevel inverter (HCMLI) topology is formed by the combination of n submodules and a full-bridge. A comparative analysis against the recent multilevel inverters reveals that the proposed topology requires less number of switches and dc sources. In addition, the proposed submodule reduces the number of conducting switch and gate driver requirements compared to the widely used half-bridge submodule. To validate the operation of the proposed HCMLI topology, experimental results of a 9-level single-phase inverter controlled by selective harmonic elimination pulse-width-modulation is presented.

Authors

I am an author on this paper
Click your name to claim this paper and add it to your profile.

Reviews

Primary Rating

4.8
Not enough ratings

Secondary Ratings

Novelty
-
Significance
-
Scientific rigor
-
Rate this paper

Recommended

No Data Available
No Data Available