Journal
IEEE TRANSACTIONS ON NANOTECHNOLOGY
Volume 17, Issue 1, Pages 184-193Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TNANO.2017.2784364
Keywords
Memristor; neuromorphic system; vector-matrix multiplication; series-resistance; feature extraction
Categories
Funding
- Defense Advanced Research Projects Agency [HR 0011-13-2-0015]
- National Science Foundation [CCF 1617315]
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Neuromorphic systems using memristors as artificial synapses have attracted broad interest for energy-efficient computing applications. However, networks based on these purely passive devices can be affected by parasitic effects such as series resistance and sneak path problems. Here, we analyze the effects of parasitic factors on the performance of memristor-based neuromorphic systems. During vector-array multiplication, the line resistance can cause significant distortion of the output current and the activity of the corresponding neurons. An approach to compensate the line resistance effects based on an approximate model consisting of only few known parameters is proposed and shows excellent ability to capture the complex network behavior. During training and feature detection, the series resistance can cause significant degradation of the learned dictionary, with only a few dominant neurons being trained. Using a scaling factor based on the proposed simple model, these effects can be successfully mitigated, and the correct network operations can be restored. These results provide insight and practical measures on the parasitic effects for implementation of the neuromorphic system using memristor arrays.
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