Journal
IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES
Volume 66, Issue 1, Pages 259-272Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TMTT.2017.2705698
Keywords
Digitally assisted; edge combiner PA. energy efficiency; Internet of things (IoT); phase-locked loop (PLL)-less transmitter; ring oscillator; transmitter; ultralow power; vertical delay cell
Categories
Funding
- CONACYT, Mexico
- Silicon Labs
- Texas Instruments Incorporated
- Qualcomm
- Intel
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Wireless transmitters (Tx) targeting Internet-of-things (IoT) applications impose tough end-to-end efficiency requirements. The frequency synthesis problem is usually solved by incorporating a variant of the phase-locked loop. However, power-hungry dividers and large loop time constants hurt the aggregated Tx power consumption and produce systems with slow start-up and turnaround times, particularly when operating at low output power. This paper demonstrates an agile ultralow power and energy-efficient transmitter architecture for IoT applications to address these concerns. The Tx leverages the characteristics of the wideband frequency-shift keying modulation and uses an openloop ring oscillator based on a vertical delay cell as its local oscillator (LO) generator. When followed by an edge-combiner-type power amplifier, the required LO operating frequency drops to one-third of the RF frequency, which further reduces the Tx power consumption. Moreover, LO frequency correction is achieved through a digitally assisted scheme with specially designed delay cells for fast frequency calibration. The Tx was fabricated in 0.18-mu m CMOS technology and occupies an active area of 0.112 mm(2). The experimental results show a Tx energy efficiency of 0.2 nJ/b for a 3-Mb/s data rate and a normalized energy efficiency of 3.1 nJ/b . mW when operating at a maximum output power of -10 dBm.
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