4.7 Article

Modeling and Validation of Fixture-Induced Error for Impedance Measurements

Journal

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TIM.2018.2838858

Keywords

Error analysis; fixturing; impedance analysis; metrology

Funding

  1. U.S. Office of Naval Research [N000141612940]
  2. U.S. Department of Defense (DOD) [N000141612940] Funding Source: U.S. Department of Defense (DOD)

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Measuring impedance accurately requires dedicated fixturing to match the geometry of the device under test to the ports of the instrument. These fixtures introduce error into collected measurements which is rarely acknowledged. Failure to quantify measurement error can lead to over-estimation of accuracy, increase the difficulty of measurement comparisons taken with different fixtures, and increase the risk of inappropriate fixture selection and calibration. This paper presents a methodology for characterizing and modeling the error introduced into impedance data by test fixtures. The proposed method uses direct measurements of the open-and short-calibration standards as well as a precision resistor to quantify the total error introduced by the fixture. The error of a commercially available test fixture is studied and compared with its published values to validate this method. This validated approach can model the error introduced by commercial or custom fixtures.

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