Journal
IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 65, Issue 1, Pages 101-107Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2017.2775233
Keywords
Floating-gate (FG) synapse; neuromorphic device; spike time-dependent plasticity (STDP); synapse device
Funding
- National Research Foundation of Korea - Ministry of Science, ICT and Future Planning [2016M3A7B4910348]
- IC Design Education Center, South Korea
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This paper proposes a 3-D floating-gate (FG) synapse array for neuromorphic applications. The designed device has certain advantages over previous planar FG synapse devices: a smaller cell size due to the stacked structure and smaller operation voltage by the gate-all-around geometry. In addition, the operation method to implement spike time-dependent plasticity is proposed and demonstrated. The proposed array based on commercialized flash memory technology is expected be one of the most promising candidate architecture for neuromorphic applications.
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