Journal
IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 65, Issue 1, Pages 64-71Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2017.2777803
Keywords
Asymmetric spacer tunnel layer (ASPAT) tunneling device; dc and RF characterization; physical modeling
Funding
- Engineering and Physical Sciences Research Council
- Royal Society
- Engineering and Physical Sciences Research Council [EP/P006973/1] Funding Source: researchfish
- EPSRC [EP/P006973/1] Funding Source: UKRI
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A complete description of physicalmodels for fabricated asymmetric spacer tunnel layer (ASPAT) diodes is reported in this paper. A novel In0.53Ga0.47As/AlAs design is presented and compared to the conventional GaAs/AlAs material system. For both material schemes, physical models were developed based on experimental measurements. Simulated dc characteristics of the devices are given for both planar-and back-contacted structures to highlight the impact of spreading resistance on device behavior. Furthermore, full S-parameter derivations from numerical simulation for tunnel diodes are demonstrated for the first time on the basis of quantum-mechanical ac modeling of the capacitance-voltage and conductance-voltage performances of these ASPAT diodes. A negligibly small difference between measured and simulated zero-biased intrinsic capacitances is observed (i.e., <= 0.2 fF). These are beneficial for accurate predictive models for device characteristics. In addition, key parameters which can be extracted from simulation results are obtained to aid in the development of millimeter-wave/terahertz applications of these types of heterostructure tunnel devices.
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