Journal
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
Volume 66, Issue 1, Pages 36-40Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCSII.2018.2834899
Keywords
Capacitor-less; digital LDO; low-dropout regulator; hybrid LDO; low ripple
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A hybrid low-dropout regulator (LDO) with exponential-ratio array (ERA) and analog based transient voltage compensation is implemented in 65-nm CMOS. The hybrid LDO (HLDO) is capable of reducing a voltage drop upon load change by more than 70%, and the ERA enables fast tracking time, enlarging dynamic range of the digital loop. The HLDO achieves 99.7% current efficiency with the output dynamic range of 0.01-to-40 mA (4000x) and obtains the transient output voltage drop of 55 mV for a load current jump of 0.55 mA from 20 mu A. When both the dynamic and the static performances are considered, the proposed HLDO shows the state-of-the-art performance among other recent digital LDOs and HLDOs.
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