Journal
IEEE COMMUNICATIONS MAGAZINE
Volume 56, Issue 6, Pages 172-178Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/MCOM.2018.1601068
Keywords
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Funding
- NSF [CCF 16-29431]
- European Commission [H2020-FETOPEN-736876]
- Spanish MINECO [TEC2017-90034-C2-1-R]
- Catalan Institution for Research and Advanced Studies (ICREA)
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Wireless on-chip communication is a promising candidate to address the performance and efficiency issues that arise when scaling current NoC techniques to manycore processors. A WNoC can serve global and broadcast traffic with ultra-low latency even in thousand-core chips, thus acting as a natural complement to conventional and throughput-oriented wireline NoCs. However, the development of MAC strategies needed to efficiently share the wireless medium among the increasing number of cores remains a considerable challenge given the singularities of the environment and the novelty of the research area. In this position article, we present a context analysis describing the physical constraints, performance objectives, and traffic characteristics of the on-chip communication paradigm. We summarize the main differences with respect to traditional wireless scenarios, and then discuss their implications on the design of MAC protocols for manycore WNoC, with the ultimate goal of kickstarting this arguably unexplored research area.
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