HDL Implementation of DFT architectures using Winograd Fast Fourier Transform Algorithm

The most of the communication standard such as Digital Terrestrial/Television Multimedia Broadcasting (DMB-T) require non power of two size Discrete Fourier Transforms (DFTs). Winograd Fast Fourier Transform algorithm (WFFT) is a Fast Fourier algorithm which fulfil requirement by calculating non power of two size DFTs. In this paper, prime size DFTs are calculated using polynomial base WFFT and those are compared with conventional definition base algorithm in terms of arithmetic operations which drastically reduce area and increase speed. Theoretically, WFFT is very complex algorithm involving Chinese Remainder theorem (CRT) for polynomial calculations while for practical implementation it is one of the best optimize FFT algorithm. This paper includes prime size WFFT architectures, implemented in Verilog and simulated using Xilinx ISE 13.1. One of the future applications in communication domain is that utilisation of DFT architectures to compute IDFT which can be serve purpose in the receiving side of orthogonal frequency division multiplexing (OFDM) system.