Charge Transport in Low-Temperature Processed Thin-Film Transistors Based on Indium Oxide/Zinc Oxide Heterostructures

The influence of the composition within multilayered heterostructure oxide semiconductors has a critical impact on the performance of thin-film transistor (TFT) devices. The heterostructures, comprising alternating polycrystalline indium oxide and zinc oxide layers, are fabricated by a facile atomic layer deposition (ALD) process, enabling the tuning of its electrical properties by precisely controlling the thickness of the individual layers. This subsequently results in enhanced TFT performance for the optimized stacked architecture after mild thermal annealing at temperatures as low as 200 degrees C. Superior transistor characteristics, resulting in an average field-effect mobility (mu(sat).) of 9.3 cm2 V-1 s(-1) ( W/ L = 500), an on/off ratio (I-on/ I-off) of 5.3 x 109, and a subthreshold swing of 162 mV dec(-1), combined with excellent long-term and bias stress stability are thus demonstrated. Moreover, the inherent semiconducting mechanism in such multilayered heterostructures can be conveniently tuned by controlling the thickness of the individual layers. Herein, devices comprising a higher In2O3/ZnO ratio, based on individual layer thicknesses, are predominantly governed by percolation conduction with temperature-independent charge carrier mobility. Careful adjustment of the individual oxide layer thicknesses in devices composed of stacked layers plays a vital role in the reduction of trap states, both interfacial and bulk, which consequently deteriorates the overall device performance. The findings enable an improved understanding of the correlation between TFT performance and the respective thin-film composition in ALD-based heterostructure oxides.