4.7 Article

Creating Active Device Materials for Nanoelectronics Using Block Copolymer Lithography

Journal

NANOMATERIALS
Volume 7, Issue 10, Pages -

Publisher

MDPI
DOI: 10.3390/nano7100304

Keywords

nanoelectronics; block copolymers; lithography; directed self-assembly; device elements; tungsten trioxide

Funding

  1. Semiconductor Research Corporation [GRC Task 2444.001]
  2. AMBER SFI center Grant [12/RC/2278]
  3. Science Foundation Ireland (SFI)

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The prolonged and aggressive nature of scaling to augment the performance of silicon integrated circuits (ICs) and the technical challenges and costs associated with this has led to the study of alternative materials that can use processing schemes analogous to semiconductor manufacturing. We examine the status of recent efforts to develop active device elements using nontraditional lithography in this article, with a specific focus on block copolymer (BCP) feature patterning. An elegant route is demonstrated using directed self-assembly (DSA) of BCPs for the fabrication of aligned tungsten trioxide (WO3) nanowires towards nanoelectronic device application. The strategy described avoids conventional lithography practices such as optical patterning as well as repeated etching and deposition protocols and opens up a new approach for device development. Nanoimprint lithography (NIL) silsesquioxane (SSQ)-based trenches were utilized in order to align a cylinder forming poly(styrene)-block-poly(4-vinylpyridine) (PS-b-P4VP) BCP soft template. We outline WO3 nanowire fabrication using a spin-on process and the symmetric current-voltage characteristics of the resulting Ti/Au (5 nm/45 nm) contacted WO3 nanowires. The results highlight the simplicity of a solution-based approach that allows creating active device elements and controlling the chemistry of specific self-assembling building blocks. The process enables one to dictate nanoscale chemistry with an unprecedented level of sophistication, forging the way for next-generation nanoelectronic devices. We lastly outline views and future research studies towards improving the current platform to achieve the desired device performance.

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