A High-Voltage Closed-Loop SC Interface for a ± 50 g Capacitive Micro-Accelerometer With 112.4 dB Dynamic Range

A low-noise high-linearity switched capacitor interface implemented in a 0.35 mu m 3.3 V/15 V CMOS process is presented in this paper for a +/- 50g capacitive micro-accelerometer. The sensing element is enclosed in an optimized closed loop with proportional-integral compensation, improving the linearity significantly. In order to suppress the flicker noise of the front-end at the lowest cost, a novel switched capacitor PI controller combined with a charge sensitive amplifier using correlated double sampling is proposed. Furthermore, a detailed noise analysis of the proposed CSA-PIC combination with a final goal of achieving 120 dB dynamic range is also presented. The theoretical analysis is verified by the consistency between calculated results and PNoise simulation results. The sensor output can be read in analogue domain from a sample-and-hold buffer or in digital domain from a back-end 2-1 MASH Sigma-Delta ADC. The fabricated prototype circuit measures 11.75 mm(2) and operates under 15-V and 3.3-V supplies at a sampling clock of 111 KHz. Meanwhile, a sensitivity of 99.7 mV/g is achieved with a dynamic range of 112.4 dB over a 200-Hz bandwidth. The accelerometer has a DC nonlinearity of 0.623% in the range of -18 g to +14 g measured in self-test mode and the bias instability is 200 mu g.