Journal
PHYSICAL REVIEW B
Volume 96, Issue 16, Pages -Publisher
AMER PHYSICAL SOC
DOI: 10.1103/PhysRevB.96.165402
Keywords
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Funding
- National Natural Science Foundation of China [11674039, 11574304, 11774388]
- China Postdoctoral Science Foundation [2016M601099]
- Scientific Research Fund of Hunan Provincial Education Department [15A004]
- Youth Innovation Promotion Association CAS [2016109]
- Chinese Academy of Sciences-Peking University Pioneer Cooperation Team (CAS-PKU Pioneer Cooperation Team)
- Office of Science (SC), Basic Energy Science (BES), Materials Science and Engineering Division (MSED), of the U.S. Department of Energy (DOE) through the Material Theory Program [DE-AC02-05CH11231, KC2301]
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As Moore's law approaches its end, two-dimensional (2D) materials are intensely studied for their potentials as one of the More than Moore' (MM) devices. However, the ultimate performance limits and the optimal design parameters for such devices are still unknown. One common problem for the 2D-material-based device is the relative weak on-current. In this study, two-dimensional Schottky-barrier field-effect transistors (SBFETs) consisting of in-plane heterojunctions of 1T metallic-phase and 2H semiconducting-phase transition-metal dichalcogenides (TMDs) are studied following the recent experimental synthesis of such devices at a much larger scale. Our ab initio simulation reveals the ultimate performance limits of such devices and offers suggestions for better TMD materials. Our study shows that the Schottky-barrier heights (SBHs) of the in-plane 1T/2H contacts are smaller than the SBHs of out-of-plane contacts, and the contact coupling is also stronger in the in-plane contact. Due to the atomic thickness of the monolayer TMD, the average subthreshold swing of the in-plane TMD-SBFETs is found to be close to the limit of 60 mV/dec, and smaller than that of the out-of-plane TMD-SBFET device. Different TMDs are considered and it is found that the in-plane WTe2-SBFET provides the best performance and can satisfy the performance requirement of the sub-10-nm high-performance transistor outlined by the International Technology Roadmap for Semiconductors, and thus could be developed into a viable sub-10-nm MM device in the future.
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