Further optimization of VLS localized epitaxy for deeper 4H-SiC p-n junctions

This paper deals with localized epitaxy of highly p-doped 4H-SiC, based on VLS transport, and intended to be used both for the emitter of PN or PiN devices, and for the peripheral protection of power devices. The goal was to fill-in 1 mu m-deep wells, plasma etched, into n-type epilayers. We have previously shown that true p-n junctions with low leakage currents can be achieved using this alternative technique without any post-growth annealing at high temperatures. We report here for the first time, the filling of etched wells up to 900 nm with p(++) SiC, presenting a regular and uniform surface morphology. In this work, we also present correlations between the physical analyses of our SiC VLS epitaxy, and the electrical characterizations performed on p/n diodes with VLS grown, locally p-type doped emitter. (C) 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim