4.8 Article

Papertronics: Multigate paper transistor for multifunction applications

Journal

APPLIED MATERIALS TODAY
Volume 12, Issue -, Pages 402-414

Publisher

ELSEVIER
DOI: 10.1016/j.apmt.2018.07.002

Keywords

Paper functionalization; Paper electronics; Dual gate paper transistors; Multifunction paper transistors; Papertronics

Funding

  1. European Project NewFun (ERC-StG-2014) [GA 640598]
  2. European Project BET-EU (H2020-TWINN-2015) [GA 692373]
  3. European Project TREND (ERC-StG-2016) [GA 716510]
  4. European Project 1D Neon (H2020-NMP-2015-IA) [685758-21D]
  5. FEDER funds through the COMPETE 2020 Programme [UID/CTM/50025/2013]
  6. FCT - Portuguese Foundation for Science and Technology [PD/BD/52627/2014]
  7. FCT [SFRH/BD/122286/2016, SFRH/BPD/115566/2016]
  8. Fundação para a Ciência e a Tecnologia [SFRH/BD/122286/2016, PD/BD/52627/2014] Funding Source: FCT

Ask authors/readers for more resources

The use of disposable recyclable, eco-friendly, sustainable and low-cost devices with multiple functions is becoming a demand in the emerging area of the Internet of Things as a way to decrease the degree of complexity of the electronic circuits required to serve a plethora of applications. Moreover, for low-cost disposable applications, it is relevant the systems to be recyclable. The idea beyond the present study concerns to exploit our imagination with simple questions such as: What happens if it is possible to have a simple and universal device architecture, easy to implement on paper substrates, but capable to provide different multiple functionalities? It would be possible to have a common template for electronic systems on paper that would be then easily customized depending on the final application? The present study answers to these demands by reporting the physics and electronics behavior of a multigate paper transistor where paper is simultaneously the substrate and the dielectric, while a metal-oxide-semiconductor (IGZO) is used as the active channel. Moreover, the same device is able to present logic functionalities simply by varying the amplitude and frequency of the input gate signals. These transistors operate at drain voltages of 1 V with low power, exhibiting I-ON/I-OFF > 10(4) and a mobility approximate to 2 cm(2) V-1 s(-1), serving the specifications for a broad range of smart disposable low power electronics. To sustain all this, an analytical compact model was developed able to precisely reproduce the response of paper-based dual-gate FETs and provide full understanding of their unique and innovative operational characteristics. (C) 2018 The Authors. Published by Elsevier Ltd. This is an open access article under the CC BY license (http://creativecommons.org/licenses/by/4.0/).

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