Journal
ELECTRONICS LETTERS
Volume 51, Issue 24, Pages 1967-1968Publisher
WILEY
DOI: 10.1049/el.2015.1644
Keywords
integrated circuit design; electronic engineering computing; learning (artificial intelligence); distance-based large margin classifier; integrated circuit; learning method; planar graph; on-chip learning; online learning; incremental learning; data set
Categories
Funding
- CNPq
- CAPES
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A new learning method for classification problems that is suitable for integrated circuit implementation is presented. The method, which outperforms current approaches in many data sets, is based on a structural description of the learning set represented by a planar graph. The final classification function is composed of a hierarchical mixture of local experts, which yields a large margin classifier for the whole learning set. Since it is based only on distance calculations, on-chip learning can also be executed. The method is also appropriate for online and incremental learning, since model parameters are obtained directly from the data set, without need of user interaction for learning.
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