Ion implantation of advanced silicon devices: Past, present and future

Ion implantation has been a key enabler, along with improvements in lithography, for the 40+ year evolution of MOS and then CMOS devices. Alterations in the channel doping levels followed the template developed by Dennard in the mid-70's from feature sizes of mm to tens of nm. When increasing channel doping in bulk planar CMOS created unacceptably high leakage current problems, ion implantation process developed past the End of the Roadmap to the geometry-controlled channels of fully-depleted finFETs and FDSOI of the present day. Future applications for nm-scale devices call for new understanding of ion damage accumulation in fin and nano-wire materials, consideration of effects of quantum confinement on channel conductivity, development of new implantation tools for efficient operation in the 100 eV range with ion and neutral species and soon after, for single-ion doping for quantum entangled, atomic electronics.