4.8 Article

A fully integrated reprogrammable memristor-CMOS system for efficient multiply-accumulate operations

Journal

NATURE ELECTRONICS
Volume 2, Issue 7, Pages 290-299

Publisher

NATURE PUBLISHING GROUP
DOI: 10.1038/s41928-019-0270-x

Keywords

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Funding

  1. Defense Advanced Research Projects Agency (DARPA) [HR0011-13-2-0015]
  2. National Science Foundation (NSF) [CCF-1617315, 1734871]
  3. Applications Driving Architectures (ADA) Research Centre, a JUMP Centre - SRC
  4. DARPA
  5. Direct For Computer & Info Scie & Enginr [1734871] Funding Source: National Science Foundation
  6. Div Of Information & Intelligent Systems [1734871] Funding Source: National Science Foundation

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Memristors and memristor crossbar arrays have been widely studied for neuromorphic and other in-memory computing applications. To achieve optimal system performance, however, it is essential to integrate memristor crossbars with peripheral and control circuitry. Here, we report a fully functional, hybrid memristor chip in which a passive crossbar array is directly integrated with custom-designed circuits, including a full set of mixed-signal interface blocks and a digital processor for reprogrammable computing. The memristor crossbar array enables online learning and forward and backward vector-matrix operations, while the integrated interface and control circuitry allow mapping of different algorithms on chip. The system supports charge-domain operation to overcome the nonlinear I-V characteristics of memristor devices through pulse width modulation and custom analogue-to-digital converters. The integrated chip offers all the functions required for operational neuromorphic computing hardware. Accordingly, we demonstrate a perceptron network, sparse coding algorithm and principal component analysis with an integrated classification layer using the system.

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