Journal
IEEE SOLID-STATE CIRCUITS LETTERS
Volume 2, Issue 9, Pages 139-142Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LSSC.2019.2935566
Keywords
Area efficient; cost effective; offset compensation; physically unclonable function (PUF); security
Funding
- Basic Science Research Program through the National Research Foundation of Korea [2019R1A2C4070438]
- IC Design Education Center (IDEC), South Korea
- National Research Foundation of Korea [2019R1A2C4070438] Funding Source: Korea Institute of Science & Technology Information (KISTI), National Science & Technology Information Service (NTIS)
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A differential NAND-structured physically unclonable function (PUF) with 20F(2) area per bit is proposed for cost-effective Internet of Things applications. With the area-efficient NAND-array structure, a key bit is generated from a pair of minimum-sized nMOS transistors by effectively amplifying threshold voltage (V-th) mismatch. By utilizing the near-threshold current of the examined transistors, high sensitivity to Vth variation, which is desired for stability, and faster operation than leakage current-based PUFs is achieved. An offset-compensated comparison scheme is provided to accurately determine the key value without bias. The proposed PUF achieves 0.06% BER and 0.53% unstable bits with TMV11 while reducing the area by an order of magnitude compared with state-of-the-art CMOS-based PUFs.
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