Turnkey Methodology for Characteristic Impedance Extraction of Embedded Transmission Lines

For an embedded transmission line, as interconnect in integrated circuits or in high density PCB, the extraction of its characteristic impedance from S-parameters measurements remains a challenge. Robust de-embedding procedures are required to avoid parasitic effects induced by the electrical environment to access to the transmission line under test. A de-embedding methodology allowing to retrieve the propagation parameters of a planar transmission line buried between its access transitions is presented. The procedure is developed using previous works published by reputed authors and improved for an easy and efficiency use in integrated environments. Characteristic impedance extraction results are given from 10 MHIz to 67 GHz for a CPW transmission line and compared to modeling results from a 3D full-wave solver. A robustness study is performed to validate the reliability of this technique over existing ones.