Journal
2019 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATION (VLSI-TSA)
Volume -, Issue -, Pages -Publisher
IEEE
DOI: 10.1109/vlsi-tsa.2019.8804697
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Funding
- Semiconductor Research Corporation [2824.001]
- National Science Foundation [1815616]
- Division of Computing and Communication Foundations
- Direct For Computer & Info Scie & Enginr [1815616] Funding Source: National Science Foundation
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This work proposes 6T-2R-2S Non-Volatile (NV)-Static Random Access Memory (SRAM) bitcell for state retention applications with minimal sneak path current without incurring active cell area overhead. Various operating modes are described and Vmin/power comparisons with the baseline 6T SRAM are presented.
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