4.3 Article

SKIROC2_ CMS an ASIC for testing CMS HGCAL

Journal

JOURNAL OF INSTRUMENTATION
Volume 12, Issue -, Pages -

Publisher

IOP PUBLISHING LTD
DOI: 10.1088/1748-0221/12/02/C02019

Keywords

Front-end electronics for detector readout; Timing detectors; VLSI circuits

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SKIROC2_ CMS is a chip derived from CALICE SKIROC2 that provides 64 channels of low noise charge preamplifiers optimized for 50 pF pin diodes and 10 pC dynamic range. They are followed by high gain and low gain 25 ns shapers, a 13-deep 40MHz analog memory used as a waveform sampler at 40 MHz. and 12-bit ADCs. A fast shaper followed by discriminator and TDC provide timing information to an accuracy of 50 ps, in order to test TOT and TOA techniques at system level and in test-beam. The chip was sent to fabrication in January 2016 in AMSSiGe 0,35 mu m and was received in May. It was tested in the lab during the summer and will be mounted on sensors for beam-tests in the fall.

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