Journal
2019 SYMPOSIUM ON VLSI CIRCUITS
Volume -, Issue -, Pages C140-C141Publisher
IEEE
DOI: 10.23919/vlsic.2019.8777942
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This paper presents an energy-efficient comparator with a novel dynamic pre-amplifier (pre-amp). By using an inverter-based input pair powered by a floating reservoir capacitor, the pre-amp realizes both current reuse and dynamic bias, thereby significantly boosting g(m)/I-D and reducing noise. Moreover, it greatly reduces the influence of the input common-mode (CM) voltage on the comparator performance, including noise, offset, and delay. A prototype comparator in 180nm achieves 46uV input-referred noise while consuming only 1pJ per comparison under 1.2V supply. This represents >7x energy efficiency boost compared to a Strong-Arm (SA) latch, it achieves the highest reported energy efficiency to authors' best knowledge.
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