Journal
2019 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI (ISVLSI 2019)
Volume -, Issue -, Pages 398-403Publisher
IEEE COMPUTER SOC
DOI: 10.1109/ISVLSI.2019.00078
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Approximate computing provides a paradigm shift to reduce the hardware cost or improve the speed of logic circuits by relaxing the quality of computation. This paper presents a novel approximate logic design methodology that integrates input data distribution to optimize the performance for specific applications. Furthermore, the proposed approach also provides sufficient scalability as only the circuit netlist and input data are needed in designing the approximate circuit. Our experimental results show that the data-driven designs generated by the proposed method achieve significantly better accuracy than the data-independent ones, while maintaining minimal hardware overheads. For example, in the design of an approximate finite impulse response (FIR) filter, our method reduces nearly 40% of the error metrics while still achieving a 29% area reduction, compared to the original exact circuit, which further validating the robustness of the proposed method beyond arithmetic elements.
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