Journal
IEEE TRANSACTIONS ON POWER ELECTRONICS
Volume 32, Issue 9, Pages 6666-6672Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TPEL.2017.2674973
Keywords
Quadrature signal generation (QSG); phase-locked loop (PLL); second-order generalized integrator (SOGI); synchronization
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The implementation of a large number of single-phase phase-locked loops (PLLs) involves creating a fictitious quadrature signal. Apopular approach for this purpose is using a second-order generalized integrator-based quadrature signal generator (SOGI-QSG) because it results in an acceptable speed/accuracy tradeoff. The SOGI-QSG-based PLL (or briefly the SOGI-PLL), in its standard form, involves a frequency feedback loop for adjusting the SOGI resonance frequency under frequency drifts. Some recent research works have reported that the speed/accuracy tradeoff of the SOGI-PLL can be considerably enhanced by removing the frequency feedback loop. In these methods, the SOGI resonance frequency is fixed at the nominal frequency, and a compensation strategy for correcting errors caused under off-nominal frequencies is employed. The main aim of this letter is to provide a critical analysis of frequency-fixed SOGI-based PLLs to highlight their real advantages and disadvantages.
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