A 410-nW Efficient QRS Processor for Mobile ECG Monitoring in 0.18-μm CMOS

This paper proposes a low power and efficient QRS processor for real-time and continuous mobile ECG monitoring. The QRS detector contains the wavelet transform (WT), the modulus maxima pair identification (MMPI), and the R position modification (RPM). In order to reduce power consumption, we choose the Haar function as the mother wavelet of WT. It is implemented by an optimized FIR filter structure where none of the multiplier is used. The MMPI processes the wavelet coefficients at scale 24 and provides candidate R peak positions for the RPM. To improve the accuracy and robust performance, a number of modules have been designed in MMPI, including the preprocessing unit, the automatic threshold updating, and the decision state machine. The RPM is designed to eliminate digital time delay in wavelet transform and locate the R peak position precisely. Raw ECG signals and QRS detection results are output simultaneously. Fabricated in 0.18-mu m N-well CMOS 1P6M technology, the power consumption of this chip is only about 410 nW in 1 V voltage supply. Validated by all 48 sets of data in the MIT-BIH arrhythmia database, the sensitive and the positive prediction are 99.60% and 99.77% respectively.