4.7 Article

A Power-Efficient Mixed-Signal Smart ADC Design With Adaptive Resolution and Variable Sampling Rate for Low-Power Applications

Journal

IEEE SENSORS JOURNAL
Volume 17, Issue 11, Pages 3461-3469

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JSEN.2017.2680472

Keywords

Adaptive resolution; Huffman coding; lossless compression; smart ADC; wearable device; VLSI

Funding

  1. Ministry of Science and Technology, China [MOST-106-2119M-033-001, MOST-105-2221-E-033-059, 105-2622-E-033-001-CC2, MOST-104-2221-E-033-042, MOST-104-2218-E-033-009, MOST-104-2622-E-033-007-CC2, CYCU-EECS-10301]
  2. National Chip Implementation Center, Taiwan

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With the rapid development of portable electronics, wearable devices have become widely used to monitor body signals for long-term health care and home care applications. They detect vital signals through physiological sensors and then transmit them to a cloud database for evaluation and monitoring purposes through wireless communication systems. In this paper, a smart analog-to-digital converter (ADC) was realized by a mixed-signal application-specific integrated circuit (ASIC) based on adaptive resolution and lossless compression techniques for electrocardiogram (ECG) signal monitoring. The sampling clock for the ADC can be adaptively selected according to the characteristic of the signals. The lossless encoder consists of trend forecasting and entropy coding modules. The transmission data rate was decreased efficiently by adaptive resolution and lossless compression techniques. The chip aims to meet the low power consumption for the design, because it reduced the signal transmission rate and maintained high-quality ECG signal detection. The proposed mixed-signal ASIC design was realized using a 0.18-mu m CMOS process with a total power consumption of 78.8 mu W when operating at 1 kHz and a total chip area of 850 x 850 mu m(2).

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