Journal
IEEE ELECTRON DEVICE LETTERS
Volume 38, Issue 4, Pages 418-421Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2017.2672967
Keywords
Steep switching; negative capacitance FinFET; ferroelectric capacitor; S/D extension length (L-ext)
Categories
Funding
- Future Semiconductor Device Technology Development Program - Ministry of Trade, Industry and Energy (MOTIE) [10067746]
- Korea Semiconductor Research Consortium (KSRC)
- National Research Foundation of Korea (NRF) - Korea government [(MSIP)] [2014R1A2A1A11050637]
- Basic Science Research Program through the National Research Foundation of Korea (NRF) - Ministry of Science, ICT and Future Planning [NRF-2015R1C1A1A01051864]
- National Research Foundation of Korea [2014R1A2A1A11050637, 22A20152213124, 22A20130012582, 2015R1C1A1A01051864] Funding Source: Korea Institute of Science & Technology Information (KISTI), National Science & Technology Information Service (NTIS)
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In this letter, an n-type short-channel negative capacitance FinFET (NC-FinFET) with a hysteresis window of 0.48 V, an on-/off-current ratio of 10(7), and a sub20- mV/decade average subthreshold slope (SSavg) that is intended to overcome the Boltzmann limit (i. e., the physical limit in the SS, which is 60 mV/decade at 300 K), is experimentally demonstrated vs. a baseline FinFET with an SSavg of similar to 105 mV/decade. In our testing, we confirmed that the large hysteresis window in a short-channel NC-FinFET can be suppressed by using an appropriate source/drain extension length (L-ext). As Lext in the NC-FinFET is increased, the gate-to-source/drain capacitance (C-GS/C-GD) decreased and the hysteresis window narrows.
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