4.6 Article

Thickness Engineered Tunnel Field-Effect Transistors Based on Phosphorene

Journal

IEEE ELECTRON DEVICE LETTERS
Volume 38, Issue 1, Pages 130-133

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2016.2627538

Keywords

Tunnel field effect transistor (TFET); phosphorene; scaling; quantum transport; NEGF; hetero-junction

Funding

  1. Center for Low Energy Systems Technology, one of six centers of STARnet
  2. Semiconductor Research Corporation Program through Microelectronics Advanced Research Corporation
  3. Semiconductor Research Corporation Program through Defense Advanced Research Projects Agency

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Thickness engineered tunneling field-effect transistors (TE-TFET) as a high-performance ultra-scaled steep transistor is proposed. This device exploits a specific property of 2-D materials: layer thickness-dependent energy bandgaps (E-g). Unlike the conventional hetero-junction TFETs, TE-TFET uses spatially varying layer thickness to form a hetero-junction. This offers advantages by avoiding the lattice mismatch problems at the interface. Furthermore, it boosts the ON-current to 1280 mu A/mu m with 15-nm channel length. Providing higher ON currents, phosphorene TE-TFET outperforms the homojunction phosphorene and the TMD TFETs in terms of extrinsic energy-delay product. TE-TFET also scales well to 9 nm with constant field scaling E = V-DD/L-ch = 33 mV/nm. In this letter, the operation principles of TE-TFET and its performance sensitivity to the design parameters are investigated through full-band atomistic quantum transport simulations.

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