Journal
IEEE ELECTRON DEVICE LETTERS
Volume 38, Issue 1, Pages 40-43Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2016.2632182
Keywords
Gate-all-around (GAA); inversion-mode (IM); junctionless-mode (JM); low-frequency (LF) noise; one-route all-dry etch; SONOS; vertically stacked nanowire (VS-NW)
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Funding
- Pioneer Research Center Program through the National Research Foundation of Korea within the Ministry of Science, ICT & Future Planning [2012-0009600]
- Center for Integrated Smart Sensors within MSIP through the Global Frontier Project [CISS-2011-0031848]
- Samsung Electronics Co., Ltd
- IDEC (EDA Tool, MPW)
- National Research Foundation of Korea [2012-0009600, 2011-0031848] Funding Source: Korea Institute of Science & Technology Information (KISTI), National Science & Technology Information Service (NTIS)
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Low-frequency (LF) noise in a vertically stacked nanowire (VS-NW) memory device, which is based on the silicon-oxide-nitride-oxide-silicon(SONOS) configuration is characterized in two different operational modes, an inversion-mode and a junctionless-mode (JM). The LF noise showed 1/f-shape behavior regardless of the operational mode and followed the carrier number fluctuation model. With regard to the device-to-device variation and quality degradation of the LF noise after iterative program/erase operations, the five-story JM SONOS memory showed comparatively high immunity arising from its inherent bulk conduction and no-junction feature. Despite the harsh fabrication condition used to construct five-story VS-NW, even the five-story JM SONOS memory exhibited LF noise characteristics comparable to those of one-story JM SONOS memory. Thus, the five-story JM SONOS memory is attractive due to its high-performance capabilities and good scalability.
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