Journal
PROCEEDINGS OF 2020 27TH INTERNATIONAL CONFERENCE ON MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEM (MIXDES)
Volume -, Issue -, Pages 139-143Publisher
IEEE
Keywords
Thermal impedance; IR temperature measurement; 3D thermal modelling; Laplace transform; Forster thermal network
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A novel methodology of thermal impedance measurement by temperature monitoring out of the heat source in a power transistor is presented. A low-cost Infra-Red (IR) head is used to register evolution of temperature after step-function powering. A dedicated power generator has been developed to synchronize temperature recording with power dissipation in a device. Estimation of temperature in the heat source is performed by 3D FEM modelling of multilayer transistor structure. It allows fitting the measurement and simulation results to achieve the classically-defined thermal impedance in the heat source.
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