Modular Multilevel SOI-CMOS Active Gate Driver Architecture for SiC MOSFETs

High Voltage SiC power MOSFETs have specific driving challenges such as a reduced short circuit capability (compared to Si IGBTs) and a weak field oxide layer, a large gate to source driving voltage (compared to GaN FETs), a high electric field under negative gate bias in off-state and a high switching speed. The negative bias in off-state creates a high stress which reduces the reliability of the SiC MOSFET. The high positive gate bias can generate large drain saturation current in case of short circuit events. We propose a modular multilevel architecture, which takes benefits of SOI isolation and low voltage CMOS transistors to drive SiC MOSFETs and to improve their reliability using an active and dynamic multilevel-selection on the switching sequences and on/off states.