Journal
2020 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES (SISPAD 2020)
Volume -, Issue -, Pages 165-168Publisher
IEEE
DOI: 10.23919/sispad49475.2020.9241618
Keywords
Ferroelectric; mixed phases; variations; nonvolatile memory; in-memory computing
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Funding
- ASCENT, one of the SRC/DARPA JUMP centers
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Ferroelectric field-effect transistors (FeFETs) with 3D vertical NAND architecture (3D V-NAND) are investigated for in-memory computing. In polycrystalline ferroelectric Hafnia thin film, there are different phases such as monoclinic (M), and orthorhombic (O) phases. Those are randomly distributed throughout the ferroelectric gate stack. Such positional dispersion of two phases introduces read-out current variation in 3D V-NAND of FeFETs. Herein, we employ TCAD simulations to quantify such variation and optimize bias conditions for improving the accuracy of in-memory computing.
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