3.9 Article

A 6.4 nW 1.7% Relative Inaccuracy CMOS Temperature Sensor Utilizing Sub-Thermal Drain Voltage Stabilization and Frequency-Locked Loop

Journal

IEEE SOLID-STATE CIRCUITS LETTERS
Volume 3, Issue -, Pages 458-461

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LSSC.2020.3025962

Keywords

CMOS; low power; temperature sensing; temperature sensor; temperature-to-digital converter

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A 6.4 nW 1.7% relative inaccuracy (R-IA) CMOS sub-thermal drain voltage-based temperature sensor is proposed. The proposed stabilized sub-thermal drain voltage current generator achieves a highly linear PTAT output without nonlinearity fitting or post-fabrication trimming and increases the accuracy of the sensor. A combination of the current generator and a frequency-locked loop relaxes the tradeoff between power and temperature stability of the current-to-frequency converter and achieves supply voltage-independent operation. Measured results of the prototype fabricated in a 65-nm CMOS process show that the proposed temperature sensor has a -1.0/+ 0.7 degrees C inaccuracy (= R-IA of 1.7%) while achieving a resolution of 75 mK over a temperature range of -30 degrees C to 70 degrees C. The line sensitivity of the sensor is 2.8 degrees C/v.

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