4.4 Article

AlInGaN/GaN HEMTs With High Johnson's Figure-of-Merit on Low Resistivity Silicon Substrate

Journal

IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY
Volume 9, Issue -, Pages 130-136

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JEDS.2020.3043279

Keywords

AlInGaN; GaN-on-Si; HEMT; JFOM

Funding

  1. Ministry of Science and Technology of Taiwan ROC [MOST 105-2221-E-008 -084 -MY3]

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This work demonstrates high-performance AlInGaN/AlN/GaN high electron mobility transistors grown on 150 mm p-type low resistivity silicon substrate with state-of-the-art Johnson's figure-of-merit. The devices achieved high current gain cut-off frequency and power gain cut-off frequency with a three-terminal off-state breakdown voltage, resulting in a high JFOM. The performance of the devices is comparable or better than those on high resistivity silicon and SiC substrates for similar gate length.
This work demonstrates high-performance AlInGaN/AlN/GaN high electron mobility transistors grown on 150 mm p-type low resistivity (resistivity similar to 20-100 Omega-cm) silicon substrate with state-of-the-art Johnson's figure-of-merit (JFOM). Current gain cut-off frequency (f(T)) of 83 GHz and 63 GHz and power gain cut-off frequency (f(max)) of 95 GHz and 77 GHz with a three-terminal off-state breakdown voltage of 69 V and 127 V, resulting in a high JFOM of 5.7 THz-V and 8.1 THz-V are achieved on the devices with a gate length of 0.16 mu m and gate to drain distance of 2 mu m and 4 mu m, respectively. The f(T) and J-FOM are comparable or better than the reported values obtained on high resistivity silicon and SiC substrates for devices with similar gate length. On the other hand, GaN-on-Si HEMT structure on the LR-Si substrate exhibits lower power gain and power added efficiency due to strong capacitive coupling effects. TCAD large signal output power simulation indicates significant improvements in output power by minimizing the defects and free charge carriers in the GaN buffer even in the presence of the parasitic channel conduction and conductive silicon substrate. We further propose a modified equivalent circuit model of the parasitic conduction to take into account the conductivity of the GaN and AlGaN buffer.

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