A 108 dB DR Δ n-ary sumation - n-ary sumation M Front-End With 720 mVpp Input Range and >±300 mV Offset Removal for Multi-Parameter Biopotential Recording

The recording of biopotential signals using techniques such as electroencephalography (EEG) and electrocardiography (ECG) poses important challenges to the design of the front-end readout circuits in terms of noise, electrode DC offset cancellation and motion artifact tolerance. In this paper, we present a 2(nd)-order hybrid-CTDT Delta n-ary sumation - n-ary sumation modulator front-end architecture that tackles these challenges by taking advantage of the over-sampling and noise-shaping characteristics of a traditional Delta n-ary sumation modulator, while employing an extra n-ary sumation -stage in the feedback loop to remove electrode DC offsets and accommodate motion artifacts. To meet the stringent noise requirements of this application, a capacitively-coupled chopper-stabilized amplifier located in the forward path of the modulator loop serves simultaneously as an input stage and an active adder. A prototype of this direct-to-digital front-end chip is fabricated in a standard 0.18-mu m CMOS process and achieves a peak SNR of 105.6 dB and a dynamic range of 108.3 dB, for a maximum input range of 720 mV(pp). The measured input-referred noise is 0.98 mu V-rms over a bandwidth of 0.5-100 Hz, and the measured CMRR is >100 dB. ECG and EEG measurements in human subjects demonstrate the capability of this architecture to acquire biopotential signals in the presence of large motion artifacts.

Automated summary

This paper presents a front-end architecture for recording biopotential signals that addresses challenges such as noise, electrode DC offset cancellation, and motion artifact tolerance by utilizing a Delta n-ary sumation modulator and an additional n-ary sumation stage. The prototype achieves high performance metrics, demonstrating the capability to acquire biopotential signals in the presence of large motion artifacts.