3.8 Proceedings Paper

The Effect of Coupling Memory and Block Length on Spatially Coupled Serially Concatenated Codes

Publisher

IEEE
DOI: 10.1109/VTC2021-Spring51267.2021.9448689

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Spatially coupled serially concatenated codes (SC-SCCs) are explored in this paper for their near-capacity performance and low error floor. The impact of various design aspects on performance, complexity, and latency is investigated, leading to proposed design guidelines for flexible exchange of block length and coupling memory. Results show that performance can be improved without increasing latency and complexity by using higher coupling memory with smaller blocks, achieving enhanced performance compared to uncoupled ensembles for fixed latency and complexity.
Spatially coupled serially concatenated codes (SC-SCCs) are a class of spatially coupled turbo-like codes, which have a close-to-capacity performance and low error floor. In this paper, we perform a comprehensive design space exploration, revealing different aspects of SC-SCCs and discussing various design trade-offs. In particular, we investigate the impact of coupling memory, block length, decoding window size, and number of iterations on the performance, complexity, and latency of SC-SCCs. As a result, we propose design guidelines to make the code design independent of the block length. By introducing a modified window decoding schedule, we are able to demonstrate that the block length and coupling memory can be exchanged flexibly without changing the latency and complexity of decoding and without performance loss. Thus, thanks to spatial coupling, a certain code strength and performance can be achieved by either a very small block length or a large one, while the complexity and latency are fixed. Moreover, our results show that using higher coupling memory with smaller blocks can even improve the performance without increasing the latency and complexity. For all considered cases we observe that the performance of SC-SCCs is improved with respect to the uncoupled ensembles for a fixed latency and complexity.

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