Journal
2021 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
Volume -, Issue -, Pages -Publisher
IEEE
DOI: 10.1109/ISCAS51556.2021.9401427
Keywords
Artificial Intelligence-of-Things; low-power design; wearable; field programmable gate array; ECG; co-design; convolutional neural network; inference; fusion; state machine
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Funding
- Singapore's National Research Foundation [A18A1B0045]
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This paper explores an efficient implementation of binary convolutional neural network using function merging and block reuse techniques, achieving accurate classification of ventricular beat in electrocardiogram with low energy consumption on FPGA platform.
Wearable Artificial Intelligence-of-Things (AIoT) devices demand smart gadgets that are both resource and energy-efficient. In this paper, we explore efficient implementation of binary convolutional neural network employing function merging and block reuse techniques. The hardware implemented in field programmable gate array (FPGA) platform can classify ventricular beat in electrocardiogram achieving accuracy of 97.5%, sensitivity of 85.7%, specificity of 99.0%, precision of 92.3%, and F1-score of 88.9% while consuming only 10.5-mu W of dynamic power dissipation.
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