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Electrical Impedance Tomography for Biomedical Applications: Circuits and Systems Review

Journal

IEEE OPEN JOURNAL OF CIRCUITS AND SYSTEMS
Volume 2, Issue -, Pages 380-397

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/OJCAS.2021.3075302

Keywords

Tomography; Impedance; Voltage measurement; Monitoring; Imaging; Lung; Current measurement; Analog front-end; bioimpedance; current driver; demodulation; electrical impedance tomography (EIT); integrated circuits; wearable technologies

Funding

  1. Engineering and Physical Sciences Research Council (EPSRC) [EP/T001259/1, EP/S032045/1]
  2. EPSRC [EP/T001259/1, EP/S032045/1] Funding Source: UKRI

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The interest in electrical impedance tomography (EIT) has grown due to its potential to provide low-cost, radiation-free, real-time, and wearable means for physiological status monitoring. To be competitive with other imaging modalities, understanding the requirements of the specific application and determining a suitable system design is crucial. This paper provides an overview of EIT circuits and systems, discussing architectures, current drivers, analog front-end, and demodulation circuits, with a focus on integrated circuit implementations. Commonly used circuit topologies are detailed, with tradeoffs discussed to assist in choosing an appropriate design based on the application and system priorities. The paper also presents integrated EIT systems for biomedical applications, highlighting current challenges and potential future directions.
There has been considerable interest in electrical impedance tomography (EIT) to provide low-cost, radiation-free, real-time and wearable means for physiological status monitoring. To be competitive with other well-established imaging modalities, it is important to understand the requirements of the specific application and determine a suitable system design. This paper presents an overview of EIT circuits and systems including architectures, current drivers, analog front-end and demodulation circuits, with emphasis on integrated circuit implementations. Commonly used circuit topologies are detailed, and tradeoffs are discussed to aid in choosing an appropriate design based on the application and system priorities. The paper also describes a number of integrated EIT systems for biomedical applications, as well as discussing current challenges and possible future directions.

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