Journal
2021 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
Volume -, Issue -, Pages -Publisher
IEEE
DOI: 10.1109/ISCAS51556.2021.9401558
Keywords
In-memory computing; synapses; phase-change memory
Categories
Funding
- IBM Research AI Hardware Center
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The proposed weight mapping algorithm efficiently programs a synaptic unit composed of multiple phase change memory devices, showing resilience to device-level non-idealities and yield. The algorithm is experimentally validated on a prototype PCM unit cell fabricated in the 90nm CMOS technology node.
In-memory computing using memristive devices is a promising non-von Neumann approach for making energy-efficient deep learning inference hardware. Synaptic units comprising one or more memristive devices organized in a crossbar configuration are capable of performing the matrix-vector multiply operations in place by exploiting the Kirchhoff's circuits laws. In this paper, we propose a weight mapping algorithm to efficiently program such a synaptic unit comprising multiple phase change memory (PCM) devices to target conductance values. To evaluate the programming scheme, a simulator based on the measured programming characteristics of 10,000 PCM devices is developed. It is shown that the synaptic unit can be programmed reliably without significant overhead in programming time or energy compared to a unit comprising a single PCM device, while gaining resilience to device-level non-idealities and yield. The algorithm is experimentally verified on a prototype PCM unit cell fabricated in the 90nm CMOS technology node.
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