Journal
2021 IEEE INTERNATIONAL ELECTRIC MACHINES & DRIVES CONFERENCE (IEMDC)
Volume -, Issue -, Pages -Publisher
IEEE
DOI: 10.1109/IEMDC47953.2021.9449532
Keywords
Degradation; accelerated aging test; MOSFETs; on-state resistance; gate-to-source capacitance
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This paper investigates the degradation of on-state resistance and gate-to-source capacitance in Si MOSFETs using two different test methods. The results show that degradation occurs regardless of the method used, with a gradual increase in impedance over time.
Reliability assessment of power semiconductor devices requires accelerated stress tests. Different test methods might produce different results. In this paper, two different test methods are used for on-state resistance degradation for Si MOSFETs: High frequency cycling and low frequency cycling. Presented results indicate that the degradation of on-state resistance occurs irrespective of which method is used. Additionally, gate-to-source capacitance degradation is shown where results show that the gate-to-source impedance degrades over time.
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