A Self-Healing, High Performance and Low-Cost Radiation Hardened Latch Design

This paper presents the design of a radiation-hardened latch, which is self-healable from single event upset ( SEU) at all of its internal and output nodes. The proposed latch employs clock-gating based C-elements and input-splitting inverters forming interlocked feedback loops to hold back the original data after the SEU occurs. The fault injection simulation using HSPICE (at 65 nm CMOS technology) successfully validates the self-healing capability of the proposed latch. The proposed latch also offers the highest speed of operation with the least power-delay-area product (PDAP) compared to the existing SEU self-healing latches. Simulation results show that the proposed latch offers on average 32% improvement in speed, 24% saving in power consumption and 45% lower PDAP compared to the existing SEU self-healing latches. Besides, the proposed latch has lesser or equivalent process, voltage, and temperature (PVT) sensitivity compared to existing SEU hardened latches.

Automated summary

This paper presents the design of a radiation-hardened latch that is capable of self-healing from single event upsets at all internal and output nodes. The proposed latch utilizes clock-gating based C-elements and input-splitting inverters to achieve high speed and excellent self-healing capability. Compared to existing SEU self-healing latches, the proposed latch demonstrates significant improvements in speed, power consumption, and PDAP, as well as lower PVT sensitivity.