Journal
2021 58TH ACM/IEEE DESIGN AUTOMATION CONFERENCE (DAC)
Volume -, Issue -, Pages 1051-1056Publisher
IEEE
DOI: 10.1109/DAC18074.2021.9586250
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Funding
- SRC GRC program [2944.001]
- AWS Machine Learning Research Awards
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NAAS introduces a comprehensive approach to search neural network architecture, accelerator architecture, and compiler mapping, reducing EDP in comparison to human design while also improving accuracy. This approach demonstrates the potential of data-driven methods in optimizing architecture exploration.
Data-driven, automatic design space exploration of neural accelerator architecture is desirable for specialization and productivity. Previous frameworks focus on sizing the numerical architectural hyper-parameters while neglect searching the PE connectivities and compiler mappings. To tackle this challenge, we propose Neural Accelerator Architecture Search (NAAS) that holistically searches the neural network architecture, accelerator architecture and compiler mapping in one optimization loop. NAAS composes highly matched architectures together with efficient mapping. As a data-driven approach, NAAS rivals the human design Eyeriss by 4.4 x EDP reduction with 2.7% accuracy improvement on ImageNet under the same computation resource, and offers 1.4x to 3.5x EDP reduction than only sizing the architectural hyper-parameters.
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