3.8 Proceedings Paper

A Six Level Gate-Driver Topology with 2.5 ns Resolution for Silicon Carbide MOSFET Active Gate Drive Development

Publisher

IEEE
DOI: 10.1109/ECCE-Asia49820.2021.9479081

Keywords

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Funding

  1. Research Councils UK under the Quietening ultra-low-loss SiC & GaN waveforms project [EP/R029504/1]
  2. Research Councils UK under High Current Module and Technologies Optimised for HVDC project [EP/L021579/1]

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A new high-bandwidth multilevel gate-drive topology for Silicon Carbide Active Gate-Driver Development is presented in this paper. It is able to effectively drive high-power SiC MOSFETS and is easily reproducible. Experimental results confirm MMGD's active influence on the switching behavior of high-power devices.
This paper presents a new high-bandwidth multilevel gate-drive topology for use in Silicon Carbide (SiC) Active Gate-Driver Development. The presented Modular Multilevel gate Driver (MMGD) is a voltage modulated gate-driver topology that has a resolution of 2.5 ns and a current source/sink ability of approximately 5A, allowing for driving of high-power SiC MOSFETS. The MMGD is formed of off-the-shelf components, and so is readily reproducible. The speed of the gate-driver has been found to be fast enough to effectively PWM the gate of a high-power SiC MOSFET, allowing mutliple gate-driving strategies to be investigated. Experimental results using a 1.7 kV 300 A SiC MOSFET are given to validate the MMGDs ability to actively influence the switching behaviour of a high-power device.

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