3.8 Proceedings Paper

Comparison Study of Parasitic Inductance, Capacitance and Thermal Resistance for Various SiC Packaging Structures

Publisher

IEEE
DOI: 10.1109/WIPDAASIA51810.2021.9656014

Keywords

SiC power module; parasitic inductance; parasitic capacitance; thermal resistance; Packaging

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This paper compares the parasitic parameters of six different packaging structures of SiC power modules through finite element simulation. The double-side-cooling structure has the smallest thermal resistance, while the chip-on-chip structure shows extremely small parasitic inductance and capacitance, but with complexity. The full-shielding structure has extremely small parasitic capacitance and medial parasitic inductance, with higher thermal resistance compared to other structures, while the rest three structures show mediocre performance.
Parasitic parameters of packaging structure can affect the performance of silicon carbide (SiC) devices. Previous researches on SiC power modules lack a comprehensive comparison of different kinds of packaging structures. In this paper, six kinds of power modules are designed under the same standard, and their parasitic inductance, parasitic capacitance, and thermal resistance are extracted by finite element simulation for comparison. According to the result, the double-side-cooling structure has the smallest thermal resistance. The chip-on-chip structure shows extremely small parasitic inductance and capacitance, but this structure is complex. The full-shielding structure has extremely small parasitic capacitance and medial parasitic inductance, while its thermal resistance is larger than other structures. The rest three structures show mediocre performance.

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