A Last-Level Cache Management for Enhancing Endurance of Phase Change Memory

Since PCM memory has various advantages over DRAM, it is attracting attention as the next-generation memory. However, because of a few drawbacks, such as long write latency and limited write endurance, PCM cannot be used as the conventional system's main memory. This paper proposes the last-level cache (LLC) management algorithm to improve PCM's lifetime by evicting dirty blocks evenly to the PCM. As a result, we achieved 35% longer lifetime improvement without any PCM modification.

Automated summary

This paper proposes a last-level cache (LLC) management algorithm to improve PCM's lifetime by evicting dirty blocks evenly to the PCM, resulting in a 35% longer lifetime improvement without any PCM modification.