Related references
Note: Only part of the references are listed.Roadmap on emerging hardware and technology for machine learning
Karl Berggren et al.
NANOTECHNOLOGY (2021)
Mixed-Signal Neuromorphic Computing Circuits Using Hybrid CMOS-RRAM Integration
Vishal Saxena
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS (2021)
A Low-Voltage, Low-Power Reconfigurable Current-Mode Softmax Circuit for Analog Neural Networks
Massimo Vatalaro et al.
ELECTRONICS (2021)
Reconfigurable and Dense Analog Circuit Design Using Two Terminal Resistive Memory
Abdullah Ash-Saki et al.
IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTING (2021)
An Energy-Efficient Time-Domain Analog CMOS BinaryConnect Neural Network Processor Based on a Pulse-Width Modulation Approach
Masatoshi Yamaguchi et al.
IEEE ACCESS (2021)
Memory devices and applications for in-memory computing
Abu Sebastian et al.
NATURE NANOTECHNOLOGY (2020)
Hardware Implementation of Deep Network Accelerators Towards Healthcare and Biomedical Applications
Mostafa Rahimi Azghadi et al.
IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS (2020)
Analog Vector-Matrix Multiplier Based on Programmable Current Mirrors for Neural Network Integrated Circuits
Maksym Paliy et al.
IEEE ACCESS (2020)
Energy-Efficient Time-Domain Vector-by-Matrix Multiplier for Neurocomputing and Beyond
Mohammad Bavandpour et al.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS (2019)
A Highly Linear Neuromorphic Synaptic Device Based on Regulated Charge Trap/Detrap
Jong-Moon Choi et al.
IEEE ELECTRON DEVICE LETTERS (2019)
The Next Generation of Deep Learning Hardware: Analog Computing
Wilfried Haensch et al.
PROCEEDINGS OF THE IEEE (2019)
Two-terminal floating-gate transistors with a low-power memristive operation mode for analogue neuromorphic computing
Loai Danial et al.
NATURE ELECTRONICS (2019)
Toward Reliable Multi-Level Operation in RRAM Arrays: Improving Post-Algorithm Stability and Assessing Endurance/Data Retention
Eduardo Perez et al.
IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY (2019)
Cost-Effective Reliable EEPROM Cell Based on Single-poly Structure
Peiying Song et al.
17TH IEEE INTERNATIONAL CONFERENCE ON IC DESIGN AND TECHNOLOGY (ICICDT 2019) (2019)
High-Performance Mixed-Signal Neurocomputing With Nanoscale Floating-Gate Memory Cell Arrays
Farnood Merrikh-Bayat et al.
IEEE TRANSACTIONS ON NEURAL NETWORKS AND LEARNING SYSTEMS (2018)
A Digitally Interfaced Analog Correlation Filter System for Object Tracking Applications
Mohsen Judy et al.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS (2018)
Current Mirror Array: A Novel Circuit Topology for Combining Physical Unclonable Function and Machine Learning
Zheng Wang et al.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS (2018)
Equivalent-accuracy accelerated neural-network training using analogue memory
Stefano Ambrogio et al.
NATURE (2018)
Multiscale Co-Design Analysis of Energy, Latency, Area, and Accuracy of a ReRAM Analog Neural Training Accelerator
Matthew J. Marinella et al.
IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS (2018)
A new multitime programmable non-volatile memory cell using high voltage NMOS
S. Xu et al.
MICROELECTRONICS RELIABILITY (2018)
Scaling for edge inference of deep neural networks
Xiaowei Xu et al.
NATURE ELECTRONICS (2018)
Improved Performance of Novel Vertical Assist Operating Select Gate Lateral Coupling Cell for Logic Nonvolatile Memory
Sung-Kun Park et al.
IEEE ELECTRON DEVICE LETTERS (2016)
A review of emerging non-volatile memory (NVM) technologies and applications
An Chen
SOLID-STATE ELECTRONICS (2016)
A Highly Scalable Single Poly-Silicon Embedded Electrically Erasable Programmable Read Only Memory With Tungsten Control Gate by Full CMOS Process
Chih-Ping Chung et al.
IEEE ELECTRON DEVICE LETTERS (2015)
A 1 TOPS/W Analog Deep Machine-Learning Engine With Floating-Gate Storage in 0.13 μm CMOS
Junjie Lu et al.
IEEE JOURNAL OF SOLID-STATE CIRCUITS (2015)
Single-Poly-EEPROM Cell in Standard CMOS Process for Medium-Density Applications
Luca Milani et al.
IEEE TRANSACTIONS ON ELECTRON DEVICES (2015)
Multitime Programmable Memory Cell With Improved MOS Capacitor in Standard CMOS Process
Cong Li et al.
IEEE TRANSACTIONS ON ELECTRON DEVICES (2015)
A Bit-by-Bit Re-Writable Eflash in a Generic 65 nm Logic Process for Moderate-Density Nonvolatile Memory Applications
Seung-Hwan Song et al.
IEEE JOURNAL OF SOLID-STATE CIRCUITS (2014)
Embedded Analog Nonvolatile Memory With Bidirectional and Linear Programmability
Yi-Da Wu et al.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS (2012)
Characteristics of n-Channel MOSFETs With Tailored Source/Drain Extension for Mask ROM and EEPROM Applications
Yuan-Feng Chen et al.
IEEE TRANSACTIONS ON ELECTRON DEVICES (2009)
A single-poly EEPROM cell for embedded memory applications
A. Di Bartolomeo et al.
SOLID-STATE ELECTRONICS (2009)
A 0.8-V 0.25-mW current-mirror OTA with 160-MHz GBW in 0.18-μm CMOS
Tsung-Hsien Lin et al.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS (2007)
A 1-V 140-μW 88-dB audio sigma-delta modulator in 90-nm CMOS
LB Yao et al.
IEEE JOURNAL OF SOLID-STATE CIRCUITS (2004)