Journal
ACS APPLIED ELECTRONIC MATERIALS
Volume 4, Issue 4, Pages 1684-1691Publisher
AMER CHEMICAL SOC
DOI: 10.1021/acsaelm.1c01337
Keywords
carbon nanotube; floating gate FET; reconfigurable logic gate; logic-in-memory; dual-gate FET
Funding
- National Key Research and Development Program of China [2016YFA0201903]
- Research and Development Project in Key Fields of Guangdong Province [2020B010171001]
- Opening Project of Key Laboratory of Microelectronic Devices & Integrated Technology Institute of Microelectronics, Chinese Academy of Sciences
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Carbon nanotubes (CNTs) have great potential in the field of electronic hardware as a replacement for silicon devices. By combining CNTs as channel material and TiN floating gate, the device state and logic computing can be flexibly controlled. The combination of logic and memory properties will be applied in areas such as in-memory computing and field-programmable gate arrays.
The urgent requirement for energy-efficient electronic hardware in data-intensive computing tasks, to avoid the von Neumann bottleneck, is propelling the development of computer architectures like in-memory computing. But silicon-based devices are constrained by physical limitations. Carbon nanotubes (CNTs) with a superior electronic property and intrinsic immunity for the short-channel effect (SCE) are one of the most promising candidate materials for next-generation devices. Here, a dual-gate device with a TiN floating gate utilizing a CNT network as a channel material is fabricated and characterized. By modulating the conducting state in the CNT channel with the charge stored in the floating gate, we can control the device state on the top side flexibly. This means the information stored in the floating gate can be used as an input signal in the top-gate device for logic computing. The top-gate device's multifunctional logic features (shifting from AND to OR) are obtained by carefully selecting the work point. The combination of logic and memory properties in one device may be further used in in-memory computing and field-programmable gate arrays.
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